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All of these factors, which have long been common to achieving competitiveness, are encompassed in the ten critical drivers of e-business success. When planning the development of your e-business activities, it can be useful to assess the relevance of each of these factors t o your customers, your brand, your product offer and your overall business strategy and direction. The advantage of this approach is that at the core of each of these ten factors is the need for a clear focus on the target customer.

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There is a clear distinction between target costing, taking significant costs out of products and processes during the product concept and development phases, and continuous improvement o r k:nip~n costing, driven by the necessity to make profits in a market-driven pricing environment. O n e w a y that profitable e-businesses accomplish continuous improvement costing is to institute a culture of continuous cost reduction. O n e method of achieving this, first favoured by Japanese companies, is t o encourage employees t o suggest ways to improve the business. Reducing costs becomes everyone s job in such a cultural environment and the nature of an e-business, where ideally everyone should feel some sense of ownership, understanding and affinity with their dotcom, is particularly well suited to this. The intent is not just arbitrarily t o reduce costs, but t o d o so in the context of the larger business picture, meeting price in the marlietplace, having the resources t o reinvest, making money and building a business for the future. T o achieve major cost reductions requires a review of the whole process of planning, budgeting, reporting and analysis. This is so that instead of looking backward, comparing how one has performed relative to a pre-determined estimate or standard, the favoured approach is forward thinking, driven by customers online with constantly improving analysis leading t o new insights, reduced costs atid assets and increased economic value.

One of the key reasons for the high cost of CMOS fabrication plants is that the topdown architecture required from lithographic fabrication techniques is not defect tolerant: Any transistor or interconnect that fails on the circuit potentially destroys the entire chip. Some redundancy can be built in the design, but this approach comes at some added expense. This problem is more severe for applications-speci c integrated circuits (ASICs) because each application has a di erent circuit design, unlike the mass repetition of memory or microprocessor designs. Testing represents a substantial cost, around two-thirds of the total chip development/manufacturing cost: A new circuit design must be tested to check that no mistakes in circuit design or mask fabrication have occurred. With up to 20 mask levels in some chips and with up to 300 million transistors in designs, the potential for errors at some point in the design and fabrication process is nontrivial. Nanoelectronic devices still rely on elements that have no intrinsic fault tolerance. Hence, the question is whether an architecture could be found where not all the transistors or interconnects are required to function correctly in order for the operation of the complete chip to still be viable. As implied by the discussion of the previous paragraph, this could reduce costs considerably. One of the few defect-tolerant architectures that has appeared in the recent past is the Teramac2 architecture. This concept relies on the ability to have a large number of interconnects in a system (e.g., see Fig. 6.8), so that some path may always be found around defects and nonfunctional parts of a circuit. It is similar, in a way, to the concept of a crossbar switch, Clos network, Benes network, or fat tree (these are designs of nonblocking networks, networks for which a connection from sources to destinations can always be accomplished without blocking). Before the system is run, a map of all the defects is found and the system is con gured so that the defects can be circumvented. Therefore, the Teramac approach is to build a cheap computer that is allowed to have defects, nd the defects, con gure the resources with software, compile the program, and then run the computer. Teramac (also called a Custom Con gurable Computer) is a prototype supercomputer developed at HP. While the architecture of the prototype is built on conventional electronic